1. Field of the Invention
The present invention relates to a technique for fabricating a semiconductor, and more particularly, to a method of fabricating a hafnium oxide layer and a semiconductor device having the same.
2. Description of the Related Art
Based on recent development of technologies related to semiconductor fabrication processes, downscaling of large scale integrated circuits (LSIs) is being accelerated. Particularly, in the field of a memory device, a design rule narrows down continuously, and a memory cell size smaller than or equal to 30 nm is demanded.
In a dynamic random access memory (DRAM), which is one of the most representative semiconductor devices, an area occupied by a capacitor, which is one of basic elements of a memory cell, is being gradually reduced. However, even if an area occupied by a capacitor is reduced, it is necessary to maintain a predetermined capacitance to secure a memory operational margin. Various techniques therefor have been suggested. For example, an approach for reducing a thickness of a dielectric layer may be available to secure a proper capacitance. However, in this case, a leakage current may increase due to a reduced physical thickness of the dielectric layer. To reduce such a leakage current, a technique is intensively investigated which replaces a conventional dielectric of silicon oxide with a high-k material. Due to a large band gap it has, a high-k material with a given thickness may be equivalent to an oxide with a much smaller thickness in terms of leakage current.
Another example of applications of high-k materials related to the down-scaling may be a gate insulation layer. To meet the trend of reduction of a gate width and operation voltage, a high-k material may be an alternative to silicon oxide for a gate insulation layer.
The high-k materials include a single layer structure, such as a hafnium oxide (HfO2) layer, a zirconium oxide (ZrO2) layer, and a SrTiO3 layer, or a stack layer, such as a ZrO2/Al2O3/ZrO2. From the above-listed materials, the hafnium oxide is equivalent to oxide with a thickness below 4 Å and is suitable to meet a design rule less than or equal to 20 nm. Thus, hafnium oxide is one of most prominent candidate materials for a next-generation DRAM capacitor.
The hafnium oxide exhibits greater dielectric permittivity (k), for example, equal to or higher than 60, and wider energy band gap when the hafnium oxide has a tetragonal crystal structure than when the hafnium oxide has a monoclinic crystal structure. Therefore, it is preferable to apply a hafnium oxide having the tetragonal crystal structure to a new DRAM capacitor or gate insulator. However, since the hafnium oxide is thermodynamically stable in a monoclinic crystal structure at room temperature, a tetragonal crystal structure is easily changed to a monoclinic crystal structure. Thus, it is difficult to actually obtain a hafnium oxide having the tetragonal crystal structure.